CML divide by 4 as a prescaler for RTL-SDR to sniff EMR even beyond 10GHz (update - does actual FM reception too)

Show off any of your RTL-SDR or cheap SDR related projects.
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anadish
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Joined: Tue Feb 20, 2018 1:21 pm

CML divide by 4 as a prescaler for RTL-SDR to sniff EMR even beyond 10GHz (update - does actual FM reception too)

Post by anadish » Tue Feb 20, 2018 3:37 pm

Inspired by this https://www.changpuak.ch/electronics/FA ... SCALER.php prescaler, I moved on to another one http://archive.siliconchip.com.au/cms/A ... ticle.html, as I realized that the frequency divider in the first project was not to be found in India. However, 4GHz was the upper limit for the clock divider IC used in this project by Jim Rowe, so I moved on to NB7V33M also by ON Semi divide by 4 clock divider http://www.onsemi.com/pub/Collateral/NB7V33M-D.PDFwhich has a typical upper limit of 11GHz. The idea was to create a simple and inexpensive (<$15) EMR sniffer attachment to the RTL- SDR, which can graphically show the EMR frequency spread on the SDR software (cost-wise it also beats any GHz counter with a DIY prescaler). Without a front end amplifier, the prescaler's sensitivity is around -2dB; with an ERA-3SM+ based preamp front end, the sensitivity increases to -20dB (but the preamp reduces the frequency upper limit to merely 3GHz). A BAV99 (or similar) clamping diode is needed at the input of NB7V33M if too much amplification is done before the signal goes into the clock divider IC, as the Vcc and the absolute maximum input swings are rather limited. CML logic is rather weird and it was a surprise to receive well calibrated signals from a domestic 2.4GHz microwave oven, a 900KHz cordless phone and a domestic AV-link for televisions working at 5.8GHz. It was indeed a pleasant surprise to see all these signals on the SDR. Although, it is not possible to listen in or decode these received signals, the possibility that you can see this whole range till 7GHz (my SDR has a Rafael 820T2 tuner chip with the upper limit of ~1.766GHz) was a good feeling. Adding another divide by 2 CML divider theoretically takes the range up to 14GHz, but the IC is not available here at present. I am not sure about the upper frequency limit of this CML clock divider IC, as ON Semi gives only the typical value as 11GHz. Also attached is a PCB which was used. The artwork was converted from its original initial sketchy design by me on KiCad. MS Paint gave me a great opportunity to tweak the tracks and play around freely (you need to print the PNG image of the PCB artwork at 25% size to get it right). PCB material was FR4, 0.8mm, double sided 16 micron copper clad; to carry away heat from the tiny QFN-16 package of the divider, an eyelet was passed through from the back side (needs care). The IC runs at around 2V and consumes 100mA. Four 1n4148 diodes in series act as a safety shunt across the battery supply of 3V series dropped by one 1N4007 to 2.4V. No regulators are available for 1.8 to 2.4V, however LM317 or similar adjustable regulators can be used. The IC drains the AA cells quite fast; but strangely at the present ambient of 20 degrees Celsius, the IC was not found to be heating at all, even when it is consuming some 250mW. The input capacitor was chosen to be 100pF and the output one was 47pF (not shown in the hand drawn circuit sketch). The 2 output resistors shown as 56 Ohms were actually 50 Ohms each, recommended by ON Semi (read their application note too, if interested). No resistor was required at the reset pin, as there is a 75k internal resistor which works quite well. A lot of decoupling 0.1 and 0.01 uF capacitors are strewn around to avoid unwelcome jitters, because ON Semi recommended a very elaborate multi-layer PCB which I could have got http://www.onsemi.com/PowerSolutions/ev ... V33MMNGEVB. The PCB was made using the usual laser print-hot iron print making process. Thru-hole connections were done by passing through copper cut wires as mini rivets. A 2-stage SBB5089Z-based pre-amplifier was thought to be a good idea (it could have taken the pre-amplification up to 6GHz) to sniff at weaker signal coming from 2.4GHz WiFi sources and other 3G, 4G and unknown EMR sources. However, once implemented, it failed to help, as it is not a front end device and is plagued with low sensitivity, noise and instability. A good option could be Analog Devices HMC788LP2E MMIC amplifier which works up to 10GHz. http://www.analog.com/media/en/technica ... 788lp2.pdf

(Update -- Surprisingly, with ERA-3SM+ based preamp front end, through the prescaler, the SDR received FM audio from a domestic cordless phone which actually transmits at ~920MHz; the prescaler showed it at ~250MHz. The range was nearly 10 feet.)
Attachments
CSC_0551.JPG
CSC_0551.JPG (217.4 KiB) Viewed 3286 times
CSC_0532.JPG
CSC_0532.JPG (160.25 KiB) Viewed 3286 times
CSC_0553.JPG
CSC_0553.JPG (238.28 KiB) Viewed 3286 times
Last edited by anadish on Wed Feb 21, 2018 4:02 pm, edited 7 times in total.

anadish
Posts: 5
Joined: Tue Feb 20, 2018 1:21 pm

Re: CML divide by 4 as a prescaler for RTL-SDR to sniff EMR even beyond 10GHz

Post by anadish » Tue Feb 20, 2018 5:08 pm

A few more pictures. For PCB making, print at 25%.
CSC_0556.JPG
CSC_0556.JPG (57.05 KiB) Viewed 3277 times
prescaler PCB.PNG
prescaler PCB.PNG (14.41 KiB) Viewed 3277 times
CSC_0554.JPG
CSC_0554.JPG (196.79 KiB) Viewed 3277 times

anadish
Posts: 5
Joined: Tue Feb 20, 2018 1:21 pm

Re: CML divide by 4 as a prescaler for RTL-SDR to sniff EMR even beyond 10GHz (update - does actual FM reception too)

Post by anadish » Wed Feb 21, 2018 9:10 am

Here's a screen shot from the video which shows FM reception through the prescaler.
Attachments
SDR PRESCALER RECEIVING FM AUDIO.png
SDR PRESCALER RECEIVING FM AUDIO.png (881.98 KiB) Viewed 3203 times

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