Tech Minds: Upgrading to the latest Airspy R2/Mini Firmware
Over on YouTube Tech Minds has uploaded his latest video that shows how to easily update the firmware on Airspy R2 and Mini units. The Airspy R2 ($169) and Airspy Mini ($99) are two software defined radios that can be considered a step up from an RTL-SDR in terms of performance and price. Recently the Airspy developer updated the firmware, and we show the changelog below.
This release improves the overall phase noise, tuning accuracy, dynamic range and spur responses.
- More accurate R820T/2 tuning.
- Fast R820T/2 register update by only sending the actual changes. Useful for fast scanning.
- The R820T/2 reference clock is now fed directly from the 25 MHz TCXO. No noise contribution from PLL_A at all when using the internal TCXO.
- The MCU and ADC reference clock is now using PLL_B of Si5351 in Integer mode with power of two dividers.
- EXT_CLK now feeds PLL_A for the R820T/2 and PLL_B for the LPC4370 with optimal Integer Mode and power of two dividers.
- Drive level reduced to 2mA per clock. This significantly reduces the spurs.
Tech Mind's YouTube video shows us how to check the current firmware installed, how to download the latest firmware, and finally how to actually flash the new firmware.
AIRSPY R2 & MINI Software Defined Radio Firmware Update Procedure
>>Fast R820T/2 register update by only sending the actual changes. Useful for fast scanning.
Do we see a fast scanner in sdr# or in spectrum spy ?
My understanding is the “Fast R820T/2 register update by only sending the actual changes. Useful for fast scanning” is in the windows application since there is no reference to changes for this in the airspyone_host code (last updated 2019-12-04) or airspyone_firmware code (last updated 2020-05-08), so it should be both applications since they share common windows dll files.
Basically the big change is that they have replaced all the registers generated by “ClockBuilder Pro Software” from silabs ( https://www.silabs.com/products/development-tools/software/clock ) with their own custom register settings
“The registers are generated using a custom program that optimizes the phase noise by using the integer mode”.
And reading through the diffs they also disabled the “Channel 1 = 32768Hz LPC4370 RTC (Drive Strength 2mA)” output from the SI5351C clock generator for the LPC4370 MCU, since it was not being used and like all clocks generates RF noise.