Tagged: futuresdr

Software Defined Radio Academy 2022 Conference Talks

Videos of talks from the Software Defined Radio Academy 2022 (SDRA22) conference have recently been uploaded to YouTube. SDRA22 was held during the HAMRadio World Fair in Friedrichshafen, Germany during June 2022. The talks include topics on:

  • Usage of SDR in a contest
  • HackRF Supercluster
  • PLLs in software defined radios
  • M17 Project: A new digital voice mode for VHF and up
  • RM Processor to Xilinx FPGA Connection for SDR
  • User-Assisted Spectrum Labeling
  • The perfect HF Receiver. How would it look like today?
  • FutureSDR: An Async SDR Runtime for Heterogeneous Architectures
Playlist: SDR Academy 2022 @HAM Radio Fair

FutureSDR: An Async SDR Framework Implemented in Rust

FutureSDR is an experimental open source SDR framework (similar to GNU Radio) that is being developed by Bastian Bloessl. The idea behind the framework is that it is implemented in Rust, which is a programming language that supports async (asynchronous) code. The end result to the user should be faster, more portable and lower latency digital signal processing (DSP) code. The framework is still in the early stages with there being very few DSP blocks available, but as per his blog new blocks are slowly being implemented by contributors. 

Bastian has created a presentation introducing the framework. It will only be interesting to programmers, and DSP coders, but it shows the possible software engineering improvements that we could see applied to SDR DSP code in the future. 

An experimental asynchronous SDR runtime for heterogeneous architectures that is:

  • Extensible: custom buffers (supporting accelerators like GPUs and FPGAs) and custom schedulers (optimized for your application).
  • Asynchronous: solving long-standing issues around IO, blocking, and timers.
  • Portable: Linux, Windows, Mac, WASM, Android, and prime support for embedded platforms through a REST API and web-based GUIs.
  • Fast: SDR go brrr!

FutureSDR supports Blocks with synchronous or asynchronous implementations for stream-based or message-based data processing. Blocks can be combined to a Flowgraph and launched on a Runtime that is driven by a Scheduler. It includes:

  • Single and multi-threaded schedulers, including examples for application-specific implementations.
  • Portable GPU acceleration using the Vulkan API (supports Linux, Windows, Android, …).
  • User space DMA driver for Xilinx Zynq to interface FPGAs.