A new SDR has recently launched on the CrowdSupply crowdfunding platform. This one is called "iotSDR" and is designed to be a software defined radio to help developers and enthusiasts design custom Internet of Things (IoT) algorithms and protocols.

It has a 2-channel AT86RF215 transceiver chip which is capable of tuning to all major IoT frequencies as well as a 13-bit ADC with sample rate of up to 4 MSPS. In addition is a MAX2769B chip which is used for the GNSS reception of GPS, GLONASS, Galileo and Beidou positioning satellites. An onboard ZYNQ XC7Z010 / XC7Z020 FPGA can be used for any hardware computing required.

iotSDR currently costs US$399 for the Zync XC7Z010 FPGA version, and US$599 for the Zynq XC7Z020 FPGA version. At the time of this post there are 37 days left in the campaign.

Embedding SDR in IoT

iotSDR provides a platform that allows SDR developers and enthusiasts to design innovative algorithms and cutting-edge products. While wide-band SDRs are more versatile, narrow-band transceivers perform better for many IoT-related applications. Accordingly, iotSDR hosts two narrow-band Microchip AT86RF215 transceivers that provide their own base-band cores and have the ability to handle their own I/Q signal streaming. The result is an extremely powerful tool for anyone who is looking to simplify the task of developing, testing, and deploying high-complexity frameworks.

A Powerful FPGA and a GNSS Chip to Round It Out

iotSDR’s Microchip transceivers are backed by a Zynq SoC—which provides an FPGA and a processing system in a single package—as well as a MAX2769 GNSS chip capable of streaming live signal records. That GNSS chip can be used for custom GPS, Galileo, BieDou, and GLONASS receiver development, and is perfect for projects in the location-based services (LBS) domain such as those related to navigation and surveying.

Use Existing Software, Design a Protocol, or Build a Gateway

You can drive the hardware described above using a wide variety of popular open source software, including the Xilinx PYNQ Python framework, Jupyter Notebooks, and GNU Radio.

And if your work is further down the stack, don’t worry. iotSDR still has you covered. If you want to design and implement a physical layer IoT protocol, for example—a protocol like LoRa, SigFox, WightLess, Bluetooth, BLE, 802.15.4, ZigBee, or something of your own design—this board is for you. It’s also a great place to start if you want to build a custom IoT gateway along the lines of The Things Network, LPWAN, or Google’s Thread.

Radio has long been a pillar of modernization and technology, and this remains true in the era of software-defined radio. The Internet of Things, in particular, stands to benefit from the latest advancements in SDR technology. With iotSDR, you can be part of the community that makes that happen.

Features & Specifications

• RF Transceiver: 2x Microchip/Atmel AT86RF215
  • European band: 863-870 MHz / 870-876 MHz / 915-921 MHz
  • Chinese band: 470-510 MHz / 779-787 MHz
  • North American band: 902-928 MHz
  • Korean band: 917-923.5 MHz
  • Japanese band: 920-928 MHz
  • World-wide ISM band: 2400-2483.5 MHz
• GNSS Receiver: Maxim MAX2769B supporting GPS, GLONASS, Galileo, and BieDou
• SoC: Two options available
  • Xilinx ZYNQ XC7Z010-1CLG400C
    • Dual-core ARM Cortex-A9 MPCore
    • 256 kb on-chip memory
    • DDR3 support
    • 28,000 logic cells
    • 17,600 LUTs
    • 2.1 Mb block RAM
    • 80 DSP slices
    • 2x UART, 2x CAN 2.0 B, 2x I²C, 2x SPI, 4x 32-bit GPIO
    • FPGA configuration via JTAG
  • Xilinx ZYNQ XC7Z020-1CLG400C
    • Dual-core ARM Cortex-A9 MPCore
    • 256 kb on-chip memory
    • DDR3 support
    • 85,000 logic cells
    • 53,200 LUTs
    • 4.9 Mb block RAM
    • 220 DSP slices
    • 2x UART, 2x CAN 2.0 B, 2x I²C, 2x SPI, 4x 32-bit GPIO
    • FPGA configuration via JTAG
• EEPROM Memory: 1x Microchip AT24MAC602 for RF transceiver MCU firmware and data
• Flash Memory: 1x QSPI 128 Mb flash memory for firmware
• RAM: 512 MB DDR3
• SD Card: Micro SD card slot
• General User Inputs/Outputs:
  • 2x 8-bit PL (Programmable Logic) interfaces
  • 1x 8-bit PS (Programmable Subsystems) interface
• Connectivity:
  • 1x Gigabit Ethernet
  • USB 2.0 High Speed (Microchip USB3310)
  • USB 2.0 Full Speed (Silicon Labs CP2104)
  • 2x SMA RF connector for Low Frequency IoT band
  • 2x SMA RF connector for 2.4 GHz band
  • 1x SMA connector for GNSS receiver
  • FPGA JTAG connector for external JTAG programmer/debugger
• Clock System:
  • Single clock source for both RF frontends
  • Separate clock for GNSS receiver
• Board Dimensions: 76.2 mm x 101.6 mm