Tagged: FPGA

FOSDEM 2024 Videos now Available: Synthetic Aperture WiFi RADAR, GPU DSP Acceleration and more

FOSDEM (Free and Open Source Developer’s Meeting) is a yearly conference that took place in Brussels, Belgium on 3 - 4 February 2024. This conference featured a room on Software Defined Radio and Amateur Radio.

Recently the videos of most the talks have been uploaded to their website. Some interesting talks include:

Covert Ground Based Synthetic Aperture RADAR using a WiFi emitter and SDR receiver

Link to Talk Page

Using a WiFi emitter as radiofrequency source illuminating a scene under investigation for slow movement (e.g. landslides), a Ground-Based Synthetic Aperture RADAR (GB-SAR) is assembled using commercial, off the shelf hardware. The dual-channel coherent Software Defined Radio (SDR) receiver records the non-cooperative emitter signal as well as the signal received by a surveillance antenna facing the scene. Spatial diversity for azimuth mapping using direction of arrival measurement is achieved by moving the transmitter and receiver setup on a rail along a meter-long path -- the longer the better the azimuth resolution -- with quarter wavelength steps. The fully embedded application runs on a Raspberry Pi 4 single board computer executing GNU Radio on a Buildroot-generated GNU/Linux operating system. All development files are available at https://github.com/jmfriedt/SDR-GB-SAR/

Synthetic Aperture RADAR with WiFi and USRP SDR

Using GPU for real-time SDR Signal processing

Link to Talk Page

GPU processors have become essential for image or AI processing. Can they bring anything to real-time signal processing for SDR applications? The answer is yes, of course, but not all classic algorithms (FIR, DDC, etc.) can be used "as is", sometimes a different approach must be taken. In this presentation, I will share the solutions that I implemented to achieve multi-channel DDC on NVIDIA Jetson GPU and will make a comparison with "classic CPU" approaches.

Using GPU's for Real Time Signal Processing

Maia SDR: an open-source FPGA-based project for AD936x+Zynq radios

Link to Talk Page

Maia SDR is an open-source project with the main goal of promoting FPGA development for SDR and increasing the collaboration between the open-source SDR and FPGA communities. Currently it provides a firmware image for the ADALM Pluto and other radios based on the AD936x and Zynq. This firmware can display a real-time waterfall at up to 61.44 Msps in a WebSDR-like interface using WebGL2 rendering, and record IQ data in SigMF format in the SDR DDR. The FPGA design is implemented in Amaranth, an Python-based HDL, and the software stack is implemented in Rust, targetting the embedded ARM CPU and WebAssembly.

The first firmware version was released in February 2023, and the project was presented in June in the Software Defined Radio Academy. In this talk we cover the progress since the summer, including the addition of support for devices such as the Pluto+ and AntSDR. We focus on the technical details of the project and the possibilities for re-using some of the components in other projects.

Maia SDR

DAPNET: Bringing pagers back to the 21st Century

Link to Talk Page

When talking about pagers, most of us will think about an object of the past, often seen in TV shows from the 90s, used by medical staff and businessmen. However, they're an interesting way to get simple data broadcast over amateur radio frequencies, with receivers that can be built for less than 20€. We'll explore this and understand how an extensive network can be deployed with simple equipment and using open source hardware and software.


Building a 1-Bit Oversampling SDR with not much more than a low cost FPGA

Thank you to Alberto Garlassi for submitting information about his super low parts home made FPGA software defined radio which is capable of medium wave and shortwave AM reception. What makes this design interesting is that is is created with nothing more than 3 resistors, 1 capacitor, and a low cost 30€ Lattice MachXO2 FPGA dev board.

The design makes use of the FPGA's LVDS buffer input to implement a direct sampling 1-bit ADC to which a wire antenna is directly connected to. This 1-bit resolution is increased by using an SDR trick that involves superimposing random RF noise onto the desired signal, and oversampling at 80 MHz then decimating down to a 6 kHz bandwidth. This results in an effective ADC resolution of 6-bits, from 1-bit hardware.

Synthesized on the FPGA is the ADC, Mixer, two CIC filters, an AM demodulator and a PWM circuit for audio output. The synthesis allows for medium wave and shortwave AM reception where the frequency can be tuned via PC control.

The FPGA Verilog synthesis files are available on the projects' GitHub page, and a more in depth explanation of the SDRs operation is available on its hackaday.io page. Alberto has also created a short demonstration video which is shown below.

FPGA + 3 R + 1 C = Medium and Long Wave SDR Receiver.

Building an IcoBoard FPGA based Software Defined Radio

The IcoBoard is an FPGA IO board that is compatible with the Raspberry Pi. An FPGA (Field Programmable Gate Array) is a silicon chip that can implement custom digital circuits (such as DSP processors) and be reconfigured with different circuits many times. Other silicon chips are ASICs (application specific integrated circuit) which have circuits that are set in stone.

Over on YouTube OpenTechLab has been trying to create a software defined radio with his IcoBoard FPGA. To do this he's combined it with an audio A2D/D2A (analog-to-digital/digital-to-analog) converter board and a Raspberry Pi. The video goes through the entire design process, including A2D/D2A selection and purchasing, PCB adapter design in KiCad, soldering the PCB, as well as 3D printing a frame.

In the last part of the video he does a simple test where a signal is input into the A2D converter, converted to digital and processed by the FPGA. The circuitry programmed into the FPGA then simply outputs the received data to the D2A which converts it back into an analog signal. In the next steps of the project OpenTechLab hopes to work on the software and turn it into a full SDR. Show notes for the video are available here.

[014] IcoBoard Software Defined Radio Project - Hardware

Building an SDR Transmitter using GPIO Pins on an FPGA

Recently an RTL-SDR.com reader named Jon wrote in and wanted to share his project called FPGA-TX. FPGA-TX is software that provides low-cost SDR transmit capabilities on an FPGA. It works in a similar way to RPiTX which is by simply turning the GPIO pins on and off very quickly in such as way that it generates any desired AM/FM/SSB transmission. These methods are crude and require external analog filtering, but can be used for creating almost any sort of RF transmission at a wide range of frequencies extremely cheaply. These sorts of cheap transmitters are great companions to low cost SDR dongles like the RTL-SDR.

Jon’s project runs on FPGA boards and currently supports the Digilent Nexys 4 and Digilent CMOD A7 ($75) FPGA boards. An FPGA is an integrated circuit that can be easily reconfigured to implement various different digital circuits.

FPGA-TX can transmit at frequencies of up to 400 MHz and current supports AM, FM, LSB, USB, Wideband FM and Wideband FM Stereo transmission modes. It runs on Linux. The FPGA transmitter has been tested combined together with an amplifier and filter. It can also interface with a GPS unit for clock calibration.

An FPGA Based Transmitter. In the photo: FPGA, Amplifier, Filter, Attenuator, TX/RX Switch.
An FPGA Based Transmitter. In the photo: FPGA, Amplifier, Filter, Attenuator, TX/RX Switch.
The FPGA-TX Ubuntu Interface.
The FPGA-TX Ubuntu Interface.